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 MAX2538ETI Rev. B
RELIABILITY REPORT FOR MAX2538ETI PLASTIC ENCAPSULATED DEVICES
December 12, 2003
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MAXIM INTEGRATED PRODUCTS 120 SAN GABRIEL DR. SUNNYVALE, CA 94086
Written by
Reviewed by
Jim Pedicord Quality Assurance Reliability Lab Manager
Bryan J. Preeshl Quality Assurance Executive Director
Conclusion The MAX2538 successfully meets the quality and reliability standards required of all Maxim products. In addition, Maxim's continuous reliability monitoring program ensures that all outgoing product will continue to meet Maxim's quality and reliability standards. Table of Contents I. ........Device Description II. ........Manufacturing Information III. .......Packaging Information IV. .......Die Information V. ........Quality Assurance Information VI. .......Reliability Evaluation ......Attachments
I. Device Description A. General The MAX2538 multiband LNA/Mixer IC is optimized for CDMA, GSM, and TDMA applications in both cellular and PCS bands. The MAX2538 Ic features a GPS LNA/mixer signal path for E911 and Traveler Assistance applications. The cellular and PCS signals can be routed to either IF port. For example, one IF port can be connected to an IF filter with 30kHz band-width, while the other port can drive an IF filter with a wider bandwidth. The GPS band has its own IF port. To optimize dynamic range at minimum current, the MAX2538 implements multiple LNA and mixer states, including high gain/high linearity, high gain/low linearity, mid gain, low gain, and ultra low gain. In high-gain/highlinearity mode, the high-intercept LNA minimizes desensitization in the presence of a large interfering signal. For the other gain states, the LNA current is reduced to improve standby time. Each band is implemented with a separate mixer to optimize performance for the specific band, and each mixer provides multiple linearity modes to optimize linearity and current consumption. The ultra-low gain mode operates with very little current, which results in significant power savings because the handset typically spends most of its time in this mode.
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B. Absolute Maximum Ratings Item VCC to GND Digital Input Voltage to Gnd LNA Inout (Low-Gain Mode) Level LO Input Level Digital Input Current Junction Temperature Operating Temperature Range Storage Temp. Lead Temp. (soldering 10 sec.) Continuous Power Dissipation (TA = +70C) 28-Pin Thin QFN-EP Derates above +70C 28-Pin Thin QFN-EP Rating -0.3V to +4.3V -0.3V to (VCC + 0.3V) 15dBm 5dBM 10mA +150C -40C to +85C -65C to +150C +300C 1.6W 21mW/C
II. Manufacturing Information A. Description/Function: B. Process: C. Number of Device Transistors: D. Fabrication Location: E. Assembly Location: F. Date of Initial Production: Quadruple-Mode PCS/Cellular/GPS LNA/Mixers MB20 Bi-CMOS Process 2538 Oregon, USA Thailand April, 2002
III. Packaging Information A. Package Type: B. Lead Frame: C. Lead Finish: D. Die Attach: E. Bondwire:
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28-Pin Thin QFN Copper Solder Plate Silver-Filled Epoxy Gold (1.3 mil dia.) Epoxy with silica filler # 05-3201-0017 Class UL94-V0
F. Mold Material: G. Assembly Diagram: H. Flammability Rating: I. Classification of Moisture Sensitivity per JEDEC standard JESD22-A112:
Level 1
IV. Die Information A. Dimensions: B. Passivation: C. Interconnect: D. Backside Metallization: E. Minimum Metal Width: F. Minimum Metal Spacing: G. Bondpad Dimensions: H. Isolation Dielectric: I. Die Separation Method: 89 x 87 mils Si3N4/SiO2 (Silicon nitride/ Silicon dioxide) Au None 1.2 microns (as drawn) Metal 1, 2 & 3 5.6 microns (as drawn) Metal 4 1.6 microns (as drawn) Metal 1, 2 & 3, 4.2 microns (as drawn) Metal 4 3.4 mil. Octagonal SiO2 Wafer Saw
V. Quality Assurance Information A. Quality Assurance Contacts: Jim Pedicord (Reliability Lab Manager) Bryan Preeshl (Executive Director of QA) Kenneth Huening (Vice President) B. Outgoing Inspection Level: 0.1% for all electrical parameters guaranteed by the Datasheet. 0.1% For all Visual Defects.
C. Observed Outgoing Defect Rate: < 50 ppm D. Sampling Plan: Mil-Std-105D VI. Reliability Evaluation A. Accelerated Life Test The results of the 150C biased (static) life test are shown in Table 1. Using these results, the Failure Rate () is calculated as follows: = 1 = MTTF 1.83 (Chi square value for MTTF upper limit) 192 x 9823 x 178 x 2 Temperature Acceleration factor assuming an activation energy of 0.8eV = 2.73 x 10-9 = 2.73 F.I.T. (60% confidenc e level @ 25C)
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This low failure rate represents data collected from Maxim's reliability qualification and monitor programs. Maxim also performs weekly Burn-In on samples from production to assure reliability of its processes. The reliability required for lots which receive a burn-in qualification is 59 F.I.T. at a 60% confidence level, which equates to 3 failures in an 80 piece sample. Maxim performs failure analysis on rejects from lots exceeding this level. The attached Burn-In Schematic #06-7030 shows the static circuit used for this test. Maxim also performs 1000 hour life test monitors quarterly for each process. This data is published in the Product Reliability Report (RR-1M). B. Moisture Resistance Tests Maxim evaluates pressure pot stress from every assembly process during qualification of each new design. Pressure Pot testing must pass a 20% LTPD for acceptance. Additionally, industry standard 85C/85%RH or HAST tests are performed quarterly per device/package family. C. E.S.D. and Latch-Up Testing The WC19-3 die type has been found to have all pins able to withstand a transient pulse of 600V, per MilStd-883 Method 3015 (reference attached ESD Test Circuit). Latch-Up testing has shown that this device withstands a current of 250mA.
Table 1 Reliability Evaluation Test Results MAX2538ETI
TEST ITEM TEST CONDITION FAILURE IDENTIFICATION SAMPLE SIZE NUMBER OF FAILURES
Static Life Test (Note 1) Ta = 150C Biased Time = 192 hrs. Moisture Testing (Note 2) Pressure Pot Ta = 121C P = 15 psi. RH= 100% Time = 168hrs. Ta = 85C RH = 85% Biased Time = 1000hrs.
DC Parameters & functionality
178
0
DC Parameters & functionality
77
0
85/85
DC Parameters & functionality
77
0
Mechanical Stress (Note 2) Temperature Cycle www..com -65C/150C 1000 Cycles Method 1010 DC Parameters &functionality 77 0
Note 1: Life Test Data may represent plastic DIP qualification packages. Note 2: Generic package/process data.
Attachment #1 TABLE II. Pin combination to be tested. 1/ 2/
Terminal A (Each pin individually connected to terminal A with the other floating) 1. 2. All pins except VPS1 3/ All input and output pins
Terminal B (The common combination of all like-named pins connected to terminal B) All VPS1 pins All other input-output pins
1/ Table II is restated in narrative form in 3.4 below. 2/ No connects are not to be tested. 3/ Repeat pin combination I for each named Power supply and for ground (e.g., where VPS1 is VDD, VCC, VSS, VBB, GND, +VS, -VS, VREF, etc). 3.4 a.
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Pin combinations to be tested. Each pin individually connected to terminal A with respect to the device ground pin(s) connected to terminal B. All pins except the one being tested and the ground pin(s) shall be open. Each pin individually connected to terminal A with respect to each different set of a combination of all named power supply pins (e.g., VSS1, or V SS2 or V SS3 or V CC1 , or V CC2 ) connected to terminal B. All pins except the one being tested and the power supply pin or set of pins shall be open. Each input and each output individually connected to terminal A with respect to a combination of all the other input and output pins connected to terminal B. All pins except the input or output pin being tested and the combination of all the other input and output pins shall be open.
b.
c.
TERMINAL C
R1 S1 R2
TERMINAL A REGULATED HIGH VOLTAGE SUPPLY
S2 C1
DUT SOCKET
SHORT CURRENT PROBE (NOTE 6)
TERMINAL B Mil Std 883D Method 3015.7 Notice 8
R = 1.5k C = 100pf
TERMINAL D
5x5x0.8 MM QFN THIN PKG.
EXPOSED PAD PKG.
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ONCE PER SOCKET
ONCE PER BOARD
100 pF
50 OHM
50 OHM
28 50 OHM 1 50 OHM 100 pF 2
27
26
25
50 OHM 24
100 pF 23
22
21
20
3 50 OHM 100 pF 4
19
18
5 50 OHM 100 pF 6
17 50 OHM 16
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7
28 - QFN
8 50 OHM 9 50 OHM 10 11 12 13 14
15
27 OHM
50 OHM
50 OHM
21 K
3.6V
100 nF
100 pF
DEVICES: MAX 2538 MAX. EXPECTED CURRENT = 40mA
DRAWN BY: HAK TAN NOTES:
DOCUMENT I.D. 06-7030
REVISION A
MAXIM
TITLE: BI
Circuit (MAX2538)
PAGE
2
OF 3


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